Publications

Verification of CoreSwap: Replacing ARM Cortex-A5 with RISC-V CVA6 in ARM SoC Environment. RISC-V Summit Europe, Paris, France, 2025.
Comprehensive Verification of the RISC-V Memory Management Unit: Challenges and Solutions. RISC-V Summit Europe, Paris, France, 2025.
Enhancing Privilege Architecture Support in RISC-V ISAC. RISC-V Summit Europe, Munich, Germany, 2024.